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Force AXIS RAM switch output FIFO into distributed RAM
Signed-off-by: Alex Forencich <[email protected]>
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rtl/axis_ram_switch.v

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@@ -912,11 +912,17 @@ generate
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assign port_cmd_status_ready[m] = int_cmd_status_ready[m*M_COUNT+n];
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end
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(* ram_style = "distributed", ramstyle = "no_rw_check, mlab" *)
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reg [DATA_WIDTH-1:0] out_fifo_tdata[31:0];
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(* ram_style = "distributed", ramstyle = "no_rw_check, mlab" *)
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reg [KEEP_WIDTH-1:0] out_fifo_tkeep[31:0];
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(* ram_style = "distributed", ramstyle = "no_rw_check, mlab" *)
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reg out_fifo_tlast[31:0];
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(* ram_style = "distributed", ramstyle = "no_rw_check, mlab" *)
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reg [M_ID_WIDTH-1:0] out_fifo_tid[31:0];
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(* ram_style = "distributed", ramstyle = "no_rw_check, mlab" *)
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reg [M_DEST_WIDTH-1:0] out_fifo_tdest[31:0];
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(* ram_style = "distributed", ramstyle = "no_rw_check, mlab" *)
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reg [USER_WIDTH-1:0] out_fifo_tuser[31:0];
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reg [5:0] out_fifo_data_wr_ptr_reg = 0;

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