Skip to content

Commit c33b848

Browse files
author
Jiang Jiang Jian
committed
Merge branch 'bugfix/fix_chip_hangup_v6.0' into 'release/v6.0'
bugfix: clear regdma status when restart V6.0 See merge request espressif/esp-idf!43908
2 parents 15eba7d + e5fb2f5 commit c33b848

File tree

6 files changed

+12
-0
lines changed

6 files changed

+12
-0
lines changed

‎components/esp_system/port/soc/esp32c5/system_internal.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,7 @@ void esp_system_reset_modules_on_exit(void)
5959
SET_PERI_REG_MASK(PCR_SDIO_SLAVE_CONF_REG, PCR_SDIO_SLAVE_RST_EN);
6060
//ETM may directly control the GPIO or other peripherals even after CPU reset. Reset to stop these control.
6161
SET_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
62+
SET_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
6263

6364
// Clear Peripheral clk rst
6465
CLEAR_PERI_REG_MASK(PCR_MSPI_CONF_REG, PCR_MSPI_RST_EN);
@@ -70,6 +71,7 @@ void esp_system_reset_modules_on_exit(void)
7071
CLEAR_PERI_REG_MASK(PCR_PWM_CONF_REG, PCR_PWM_RST_EN);
7172
CLEAR_PERI_REG_MASK(PCR_SDIO_SLAVE_CONF_REG, PCR_SDIO_SLAVE_RST_EN);
7273
CLEAR_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
74+
CLEAR_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
7375

7476
// Reset crypto peripherals. This ensures a clean state for the crypto peripherals after a CPU restart
7577
// and hence avoiding any possibility with crypto failure in ROM security workflows.

‎components/esp_system/port/soc/esp32c6/system_internal.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,7 @@ void esp_system_reset_modules_on_exit(void)
5454
SET_PERI_REG_MASK(PCR_PWM_CONF_REG, PCR_PWM_RST_EN);
5555
//ETM may directly control the GPIO or other peripherals even after CPU reset. Reset to stop these control.
5656
SET_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
57+
SET_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
5758

5859
// Clear Peripheral clk rst
5960
CLEAR_PERI_REG_MASK(PCR_MSPI_CONF_REG, PCR_MSPI_RST_EN);
@@ -80,6 +81,7 @@ void esp_system_reset_modules_on_exit(void)
8081
CLEAR_PERI_REG_MASK(PCR_HMAC_CONF_REG, PCR_HMAC_RST_EN);
8182
CLEAR_PERI_REG_MASK(PCR_RSA_CONF_REG, PCR_RSA_RST_EN);
8283
CLEAR_PERI_REG_MASK(PCR_SHA_CONF_REG, PCR_SHA_RST_EN);
84+
CLEAR_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
8385

8486
// UART's sclk is controlled in the PCR register and does not reset with the UART module. The ROM missed enabling
8587
// it when initializing the ROM UART. If it is not turned on, it will trigger LP_WDT in the ROM.

‎components/esp_system/port/soc/esp32c61/system_internal.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,7 @@ void esp_system_reset_modules_on_exit(void)
5959
SET_PERI_REG_MASK(PCR_SDIO_SLAVE_CONF_REG, PCR_SDIO_SLAVE_RST_EN);
6060
//ETM may directly control the GPIO or other peripherals even after CPU reset. Reset to stop these control.
6161
SET_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
62+
SET_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
6263

6364
// Clear Peripheral clk rst
6465
CLEAR_PERI_REG_MASK(PCR_MSPI_CONF_REG, PCR_MSPI_RST_EN);
@@ -69,6 +70,7 @@ void esp_system_reset_modules_on_exit(void)
6970
CLEAR_PERI_REG_MASK(PCR_MODEM_CONF_REG, PCR_MODEM_RST_EN);
7071
CLEAR_PERI_REG_MASK(PCR_SDIO_SLAVE_CONF_REG, PCR_SDIO_SLAVE_RST_EN);
7172
CLEAR_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
73+
CLEAR_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
7274

7375
// Reset crypto peripherals. This ensures a clean state for the crypto peripherals after a CPU restart
7476
// and hence avoiding any possibility with crypto failure in ROM security workflows.

‎components/esp_system/port/soc/esp32h2/system_internal.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,7 @@ void esp_system_reset_modules_on_exit(void)
5151
SET_PERI_REG_MASK(PCR_PWM_CONF_REG, PCR_PWM_RST_EN);
5252
//ETM may directly control the GPIO or other peripherals even after CPU reset. Reset to stop these control.
5353
SET_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
54+
SET_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
5455

5556
// Clear Peripheral clk rst
5657
CLEAR_PERI_REG_MASK(PCR_MSPI_CONF_REG, PCR_MSPI_RST_EN);
@@ -61,6 +62,7 @@ void esp_system_reset_modules_on_exit(void)
6162
CLEAR_PERI_REG_MASK(PCR_MODEM_CONF_REG, PCR_MODEM_RST_EN);
6263
CLEAR_PERI_REG_MASK(PCR_PWM_CONF_REG, PCR_PWM_RST_EN);
6364
CLEAR_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
65+
CLEAR_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
6466

6567
// Reset crypto peripherals. This ensures a clean state for the crypto peripherals after a CPU restart
6668
// and hence avoiding any possibility with crypto failure in ROM security workflows.

‎components/esp_system/port/soc/esp32h21/system_internal.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,7 @@ void esp_system_reset_modules_on_exit(void)
5252
SET_PERI_REG_MASK(PCR_PWM_CONF_REG, PCR_PWM_RST_EN);
5353
//ETM may directly control the GPIO or other peripherals even after CPU reset. Reset to stop these control.
5454
SET_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
55+
SET_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
5556

5657
// Clear Peripheral clk rst
5758
CLEAR_PERI_REG_MASK(PCR_MSPI_CONF_REG, PCR_MSPI_RST_EN);
@@ -62,6 +63,7 @@ void esp_system_reset_modules_on_exit(void)
6263
CLEAR_PERI_REG_MASK(PCR_MODEM_CONF_REG, PCR_MODEM_RST_EN);
6364
CLEAR_PERI_REG_MASK(PCR_PWM_CONF_REG, PCR_PWM_RST_EN);
6465
CLEAR_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
66+
CLEAR_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
6567

6668
// Reset crypto peripherals. This ensures a clean state for the crypto peripherals after a CPU restart
6769
// and hence avoiding any possibility with crypto failure in ROM security workflows.

‎components/esp_system/port/soc/esp32h4/system_internal.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,7 @@ void esp_system_reset_modules_on_exit(void)
4747
SET_PERI_REG_MASK(PCR_PWM1_CONF_REG, PCR_PWM1_RST_EN);
4848
//ETM may directly control the GPIO or other peripherals even after CPU reset. Reset to stop these control.
4949
SET_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
50+
SET_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
5051

5152
// Clear Peripheral clk rst
5253
CLEAR_PERI_REG_MASK(PCR_MSPI_CONF_REG, PCR_MSPI_RST_EN);
@@ -58,6 +59,7 @@ void esp_system_reset_modules_on_exit(void)
5859
CLEAR_PERI_REG_MASK(PCR_PWM0_CONF_REG, PCR_PWM0_RST_EN);
5960
CLEAR_PERI_REG_MASK(PCR_PWM1_CONF_REG, PCR_PWM1_RST_EN);
6061
CLEAR_PERI_REG_MASK(PCR_ETM_CONF_REG, PCR_ETM_RST_EN);
62+
CLEAR_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
6163

6264
// Reset crypto peripherals. This ensures a clean state for the crypto peripherals after a CPU restart
6365
// and hence avoiding any possibility with crypto failure in ROM security workflows.

0 commit comments

Comments
 (0)