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We can make this file beautiful and searchable if this error is corrected: It looks like row 4 should actually have 1 column, instead of 5 in line 3.
35 lines (35 loc) · 1.62 KB
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csr.csv
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35 lines (35 loc) · 1.62 KB
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#--------------------------------------------------------------------------------
# Auto-generated by LiteX (5380df39) on 2023-10-10 21:16:52
#--------------------------------------------------------------------------------
csr_base,analyzer,0x00000000,,
csr_base,ctrl,0x00000800,,
csr_base,identifier_mem,0x00001000,,
csr_register,analyzer_mux_value,0x00000000,1,rw
csr_register,analyzer_trigger_enable,0x00000004,1,rw
csr_register,analyzer_trigger_done,0x00000008,1,ro
csr_register,analyzer_trigger_mem_write,0x0000000c,1,rw
csr_register,analyzer_trigger_mem_mask,0x00000010,1,rw
csr_register,analyzer_trigger_mem_value,0x00000014,1,rw
csr_register,analyzer_trigger_mem_full,0x00000018,1,ro
csr_register,analyzer_subsampler_value,0x0000001c,1,rw
csr_register,analyzer_storage_enable,0x00000020,1,rw
csr_register,analyzer_storage_done,0x00000024,1,ro
csr_register,analyzer_storage_length,0x00000028,1,rw
csr_register,analyzer_storage_offset,0x0000002c,1,rw
csr_register,analyzer_storage_mem_level,0x00000030,1,ro
csr_register,analyzer_storage_mem_data,0x00000034,1,ro
csr_register,ctrl_reset,0x00000800,1,rw
csr_register,ctrl_scratch,0x00000804,1,rw
csr_register,ctrl_bus_errors,0x00000808,1,ro
constant,config_clock_frequency,200000000,,
constant,config_cpu_type_none,None,,
constant,config_cpu_variant_standard,None,,
constant,config_cpu_human_name,unknown,,
constant,config_bios_no_build_time,None,,
constant,config_csr_data_width,32,,
constant,config_csr_alignment,32,,
constant,config_bus_standard,wishbone,,
constant,config_bus_data_width,32,,
constant,config_bus_address_width,32,,
constant,config_bus_bursting,0,,
memory_region,csr,0x00000000,65536,io