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bubblepipebubblepipe
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add new instructions
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‎librz/arch/isa/mcs96/mcs96.h‎

Lines changed: 51 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
// SPDX-FileCopyrightText: 2015-2019 condret <[email protected]>
2-
// SPDX-FileCopyrightText: 2025 bubblepipe <bubblepipe42@protonmail.com>
2+
// SPDX-FileCopyrightText: 2025 bubblepipe <bubblepipe42@gmail.com>
33
// SPDX-License-Identifier: LGPL-3.0-only
44

55
// Source:
@@ -21,19 +21,21 @@ typedef struct mcs96_op_t {
2121
#define MCS96_3B 0x4
2222
#define MCS96_4B 0x8
2323
#define MCS96_5B 0x10
24+
#define MCS96_6B 0x20
2425

25-
#define MCS96_3B_OR_4B 0x20
26-
#define MCS96_4B_OR_5B 0x40
27-
#define MCS96_5B_OR_6B 0x80
26+
#define MCS96_3B_OR_4B 0x40
27+
#define MCS96_4B_OR_5B 0x80
28+
#define MCS96_5B_OR_6B 0x100
29+
#define MCS96_6B_OR_7B 0x200
2830

29-
#define MCS96_2OP 0x100
30-
#define MCS96_3OP 0x200
31-
#define MCS96_4OP 0x400
32-
#define MCS96_5OP 0x800
31+
#define MCS96_2OP 0x400
32+
#define MCS96_3OP 0x800
33+
#define MCS96_4OP 0x1000
34+
#define MCS96_5OP 0x2000
3335

34-
#define MCS96_REG_8 0x1000
36+
#define MCS96_REG_8 0x4000
3537

36-
#define MCS96_FE 0x2000 // 0xfe extension
38+
#define MCS96_FE 0x8000 // 0xfe extension
3739

3840
#define MCS96_8096 0x1 // supported on 8096
3941
#define MCS96_80196 0x2 // supported on 80196
@@ -42,37 +44,37 @@ typedef struct mcs96_op_t {
4244

4345
static Mcs96Op mcs96_op[] = {
4446
{ "skip", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
45-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
46-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
47-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
48-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
49-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
50-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
51-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
47+
{ "clr", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
48+
{ "not", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
49+
{ "neg", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
50+
{ "xch", MCS96_3B, MCS96_80196 | MCS96_80296 },
51+
{ "dec", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
52+
{ "ext", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
53+
{ "inc", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
5254
{ "shr", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
5355
{ "shl", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
5456
{ "shra", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 }, // 0x0a
55-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
57+
{ "xch", MCS96_4B_OR_5B | MCS96_5B, MCS96_80196 | MCS96_80296 },
5658
{ "shrl", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
5759
{ "shll", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
5860
{ "shral", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
5961
{ "norml", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
6062
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 }, // 0x10
61-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
62-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
63-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
64-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
65-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
66-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
67-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
63+
{ "clrb", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
64+
{ "notb", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
65+
{ "negb", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
66+
{ "xchb", MCS96_3B, MCS96_80196 | MCS96_80296 },
67+
{ "decb", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
68+
{ "extb", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
69+
{ "incb", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
6870
{ "shrb", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
6971
{ "shlb", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
7072
{ "shrab", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
71-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
72-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
73-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
74-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
75-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
73+
{ "xchb", MCS96_4B_OR_5B, MCS96_80196 | MCS96_80296 },
74+
{ "est", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
75+
{ "est", MCS96_6B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
76+
{ "estb", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
77+
{ "estb", MCS96_6B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
7678
{ "sjmp", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 }, // 0x20
7779
{ "sjmp", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
7880
{ "sjmp", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
@@ -235,19 +237,19 @@ static Mcs96Op mcs96_op[] = {
235237
{ "ldbse", MCS96_3B | MCS96_2OP, MCS96_8096 | MCS96_80196 | MCS96_80296 },
236238
{ "ldbse", MCS96_4B_OR_5B | MCS96_2OP, MCS96_8096 | MCS96_80196 | MCS96_80296 }, // 0xbf
237239
{ "st", MCS96_3B | MCS96_2OP, MCS96_8096 | MCS96_80196 | MCS96_80296 },
238-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
240+
{ "bmov", MCS96_3B, MCS96_80196 | MCS96_80296 },
239241
{ "st", MCS96_3B | MCS96_2OP, MCS96_8096 | MCS96_80196 | MCS96_80296 },
240242
{ "st", MCS96_4B_OR_5B | MCS96_2OP, MCS96_8096 | MCS96_80196 | MCS96_80296 },
241243
{ "stb", MCS96_3B | MCS96_2OP, MCS96_8096 | MCS96_80196 | MCS96_80296 },
242-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
244+
{ "cmpl", MCS96_3B, MCS96_80196 | MCS96_80296 },
243245
{ "stb", MCS96_3B | MCS96_2OP, MCS96_8096 | MCS96_80196 | MCS96_80296 },
244246
{ "stb", MCS96_4B_OR_5B | MCS96_2OP, MCS96_8096 | MCS96_80196 | MCS96_80296 },
245247
{ "push", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
246248
{ "push", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
247249
{ "push", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
248250
{ "push", MCS96_3B_OR_4B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
249251
{ "pop", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
250-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
252+
{ "bmovi", MCS96_3B, MCS96_80196 | MCS96_80296 },
251253
{ "pop", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
252254
{ "pop", MCS96_3B_OR_4B, MCS96_8096 | MCS96_80196 | MCS96_80296 }, // 0xcf
253255
{ "jnst", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
@@ -267,36 +269,36 @@ static Mcs96Op mcs96_op[] = {
267269
{ "jlt", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
268270
{ "je", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 }, // 0xdf
269271
{ "djnz", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
270-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
271-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
272+
{ "djnzw", MCS96_3B, MCS96_80196 | MCS96_80296 },
273+
{ "tijmp", MCS96_4B, MCS96_80196 | MCS96_80296 },
272274
{ "br", MCS96_2B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
273-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
274-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
275-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
275+
{ "ebmovi", MCS96_3B, MCS96_80196 | MCS96_80296 },
276+
{ "reti", MCS96_1B, MCS96_80296 },
277+
{ "ejmp", MCS96_4B, MCS96_80196 | MCS96_80296 },
276278
{ "ljmp", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
277-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
278-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
279-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
280-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
281-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
282-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
279+
{ "eld", MCS96_3B, MCS96_80196 | MCS96_80296 },
280+
{ "eld", MCS96_6B, MCS96_80196 | MCS96_80296 },
281+
{ "eldb", MCS96_3B, MCS96_80196 | MCS96_80296 },
282+
{ "eldb", MCS96_6B, MCS96_80196 | MCS96_80296 },
283+
{ "dpts", MCS96_1B, MCS96_80196 | MCS96_80296 },
284+
{ "epts", MCS96_1B, MCS96_80196 | MCS96_80296 },
283285
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
284286
{ "lcall", MCS96_3B, MCS96_8096 | MCS96_80196 | MCS96_80296 }, // 0xef
285287
{ "ret", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
286-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
288+
{ "ecall", MCS96_4B, MCS96_80196 | MCS96_80296 },
287289
{ "pushf", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
288290
{ "popf", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
289-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
290-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
291-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
291+
{ "pusha", MCS96_1B, MCS96_80196 | MCS96_80296 },
292+
{ "popa", MCS96_1B, MCS96_80196 | MCS96_80296 },
293+
{ "idlpd", MCS96_1B, MCS96_80196 | MCS96_80296 },
292294
{ "trap", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
293295
{ "clrc", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
294296
{ "setc", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
295297
{ "di", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
296298
{ "ei", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
297299
{ "clrvt", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
298300
{ "nop", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
299-
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 },
301+
{ "invalid", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 }, // 0xfe is the opcode for signed and unsigned operation on 8096 / 80196
300302
{ "rst", MCS96_1B, MCS96_8096 | MCS96_80196 | MCS96_80296 }
301303
};
302304

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