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1caf270
[Feature] add dtgen device tree compile-time code generator
LuisRuisinger Mar 16, 2026
9993751
Fix
LuisRuisinger Mar 17, 2026
5f029f9
[Fix]
LuisRuisinger Mar 17, 2026
52d9101
[Fix]
LuisRuisinger Mar 18, 2026
30e155f
[Fix] chosen node
LuisRuisinger Mar 22, 2026
517c27e
[Rewrite]
LuisRuisinger Mar 23, 2026
2e114fd
[Fix] codegen
LuisRuisinger Mar 23, 2026
eb75e00
[Rewrite]
LuisRuisinger Mar 23, 2026
26de47d
[WIP] dtgen integration
LuisRuisinger Mar 26, 2026
5ac9bda
[Fix] typo
LuisRuisinger Mar 26, 2026
0217888
[Fix] kani
LuisRuisinger Mar 26, 2026
f5240fe
Adding dts files device build support
LuisRuisinger Mar 28, 2026
a5f5c7f
Adding dts files device build support
LuisRuisinger Mar 28, 2026
103164e
Better design choice for reusing zephyrs device tree structure
LuisRuisinger Mar 28, 2026
b9e3748
CI test
LuisRuisinger Mar 29, 2026
f05ba4d
CI test
LuisRuisinger Mar 29, 2026
5d2344c
boards toplevel dir should contain toplevel dts of targeted board; to…
LuisRuisinger Mar 29, 2026
2bff29e
XMerge branch 'main' into feature/comptime_devicetree_gen
LuisRuisinger Mar 29, 2026
0085369
[Fix] by accident a Vec got emitted
LuisRuisinger Mar 29, 2026
f458d45
[Fix] kani proof
LuisRuisinger Mar 29, 2026
9847a34
[Fix] kani proof
LuisRuisinger Mar 29, 2026
8a4d9ee
[Fix] maybe I am genuinly too tired and stupid to write kani proofs
LuisRuisinger Mar 29, 2026
e3c571c
[Fix] restore .cargo/config.toml
LuisRuisinger Mar 30, 2026
f106d0c
[Fix] Addressing PR review
LuisRuisinger Apr 1, 2026
b225ee9
XMerge branch 'main' into feature/comptime_devicetree_gen
LuisRuisinger Apr 1, 2026
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19 changes: 19 additions & 0 deletions Cargo.lock

Some generated files are not rendered by default. Learn more about how customized files appear on GitHub.

1 change: 1 addition & 0 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,7 @@ syn = "2.0.100"
quote = "1.0.40"
rand = "0.8.5"
cfg_aliases = "0.2.1"
dtgen = { path = "xtasks/crates/dtgen" }

[lints.rust]
unexpected_cfgs = { level = "warn", check-cfg = ['cfg(kani)'] }
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5 changes: 5 additions & 0 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@ An RTOS designed and verified to enable reliable software updates and operation
|-----------|-------------|
| [src/](src/) | This is the actual kernel code of osiris. It is a hardware independent layer providing scheduling, memory management, etc. |
| [machine/](machine/) | This contains all the HALs and hardware specific code in general. It exports a hardware independent interface to the kernel. |
| [boards/](boards/) | This contains Device Tree Source (.dts) files for targeted boards. |

## Build

Expand All @@ -20,6 +21,10 @@ An RTOS designed and verified to enable reliable software updates and operation
* **Clang**: Used as the C/C++ compiler.
* **Kani**: A recent version of the Kani Rust Verifier.

Furthermore the following repositories are automatically fetched to invoke a subproject of the build process:
* **[Zephyr](https://github.com/zephyrproject-rtos/zephyr)**: Pinned to release v4.3.0
* **[HAL_STM32](https://github.com/zephyrproject-rtos/hal_stm32)**: The utilized commit is bound to the Zephyr release and can be infered through the Zephyr manifest [west.yaml](https://github.com/zephyrproject-rtos/zephyr/blob/main/west.yml)

### Development & Debugging Tools
These tools are used for flashing, debugging, and other development tasks.
* [stlink (Fork)](https://github.com/CreaxxOG/stlink): For flashing and debugging on STM32 hardware.
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233 changes: 233 additions & 0 deletions boards/nucleo_l4r5zi.dts
Original file line number Diff line number Diff line change
@@ -0,0 +1,233 @@
/*
* Copyright (c) 2018 Pushpal Sidhu
*
* SPDX-License-Identifier: Apache-2.0
*
* Modified for OsirisRTOS: removed Zephyr-specific nodes and macros,
* stripped arduino_r3_connector include.
*/

/dts-v1/;
#include <st/l4/stm32l4r5Xi.dtsi>
#include <st/l4/stm32l4r5z(g-i)tx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
model = "STMicroelectronics STM32L4R5ZI-NUCLEO board";
compatible = "st,stm32l4r5zi-nucleo";

chosen {
/delete-property/ zephyr,entropy;
/delete-property/ zephyr,flash-controller;

osiris,console = &lpuart1;
osiris,shell-uart = &lpuart1;
osiris,sram = &sram0;
osiris,flash = &flash0;
osiris,entropy = &rng;
};

leds: leds {
compatible = "gpio-leds";

green_led_0: led_0 {
gpios = <&gpioc 7 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};

blue_led_0: led_1 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};

red_led_0: led_2 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};

gpio_keys {
compatible = "gpio-keys";

user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
osiris,code = <INPUT_KEY_0>;
};
};

pwmleds: pwmleds {
compatible = "pwm-leds";
/* NOTE: disabled by default, PWM1 conflicts with SPI2 */
status = "disabled";

red_pwm_led: red_pwm_led {
pwms = <&pwm1 2 PWM_MSEC(20)
(PWM_POLARITY_NORMAL | STM32_PWM_COMPLEMENTARY)>;
};
};

aliases {
led0 = &green_led_0;
led1 = &blue_led_0;
led2 = &red_led_0;
sw0 = &user_button;
pwm-led0 = &red_pwm_led;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};

&clk_lsi {
status = "okay";
};

&clk_hsi {
status = "okay";
};

&clk_hsi48 {
status = "okay";
};

&pll {
div-m = <4>;
mul-n = <40>;
div-p = <7>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};

&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};

&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};

&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};

&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pg7 &lpuart1_rx_pg8>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};

&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
};

&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};

&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};

&spi3 {
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
&spi3_miso_pc11 &spi3_mosi_pc12>;
pinctrl-names = "default";
status = "okay";
};

osiris_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12
&usb_otg_fs_id_pa10>;
pinctrl-names = "default";
status = "okay";
};

&timers1 {
status = "okay";

pwm1: pwm {
/* NOTE: disabled by default, PWM1 conflicts with SPI2 */
pinctrl-0 = <&tim1_ch2n_pb14>;
pinctrl-names = "default";
};
};

&timers2 {
status = "okay";

pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};

&rtc {
clocks = <&rcc STM32_CLOCK(APB1, 28)>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};

&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

/* Reserve last 16KiB for property storage */
storage_partition: partition@1fb000 {
label = "storage";
reg = <0x001fb000 DT_SIZE_K(16)>;
};
};
};

&adc1 {
pinctrl-0 = <&adc1_in1_pc0>;
pinctrl-names = "default";
st,adc-clock-source = "SYNC";
st,adc-prescaler = <4>;
status = "okay";
};

&die_temp {
status = "okay";
};

&vref {
status = "okay";
};

&vbat {
status = "okay";
};
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