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Porting KC705 example to Genesys2, the implementation has been inspired by pull request #6 and is compatible with the latest commits.

unbtorsten and others added 7 commits September 16, 2021 08:26
derive example for Genesys2 board from Xilinx evaluation board KC705 which has the same FPGA
…ntation verified on hardware, but not by test bench
align FPGA part name with requirements of Xilinx Vivado
@unbtorsten unbtorsten mentioned this pull request Oct 5, 2021
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