Merge branch 'refactor/esp_hal_gpio_v6.0' into 'release/v6.0'

refactor(gpio): split GPIO HAL into separate component (v6.0)

See merge request espressif/esp-idf!43895

Author: suda-morris

components/bootloader_support/CMakeLists.txt

@@ -72,7 +72,8 @@ endif()
 if(BOOTLOADER_BUILD OR CONFIG_APP_BUILD_TYPE_RAM)
     set(include_dirs "include" "bootloader_flash/include"
         "private_include")
-    set(priv_requires micro-ecc spi_flash efuse esp_bootloader_format esp_app_format esptool_py esp_hal_wdt)
+    set(priv_requires micro-ecc spi_flash efuse esp_bootloader_format esp_app_format esptool_py)
+    list(APPEND priv_requires esp_hal_wdt esp_hal_gpio)
     list(APPEND srcs
     "src/bootloader_init.c"
     "src/bootloader_clock_loader.c"
@@ -88,7 +89,8 @@ else()
     set(include_dirs "include" "bootloader_flash/include")
     set(priv_include_dirs "private_include")
     # heap is required for `heap_memory_layout.h` header
-    set(priv_requires spi_flash mbedtls efuse heap esp_bootloader_format esp_app_format esptool_py esp_hal_wdt)
+    set(priv_requires spi_flash mbedtls efuse heap esp_bootloader_format esp_app_format esptool_py)
+    list(APPEND priv_requires esp_hal_wdt esp_hal_gpio)
 endif()
 
 if(BOOTLOADER_BUILD)

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32.c

@@ -13,7 +13,6 @@
 #include "esp_rom_efuse.h"
 #include "esp32/rom/spi_flash.h"
 #include "esp32/rom/cache.h"
-#include "soc/gpio_periph.h"
 #include "soc/efuse_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/dport_reg.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c2.c

@@ -11,7 +11,6 @@
 #include "esp_log.h"
 #include "esp_rom_gpio.h"
 #include "esp32c2/rom/spi_flash.h"
-#include "soc/gpio_periph.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
 #include "soc/soc_caps.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c3.c

@@ -12,7 +12,6 @@
 #include "esp_rom_gpio.h"
 #include "esp_rom_efuse.h"
 #include "esp32c3/rom/spi_flash.h"
-#include "soc/gpio_periph.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
 #include "soc/soc_caps.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c5.c

@@ -12,7 +12,6 @@
 #include "esp_rom_gpio.h"
 #include "esp32c5/rom/spi_flash.h"
 #include "esp32c5/rom/efuse.h"
-#include "soc/gpio_periph.h"
 #include "soc/io_mux_reg.h"
 #include "esp_rom_efuse.h"
 #include "soc/efuse_reg.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c

@@ -11,7 +11,6 @@
 #include "esp_log.h"
 #include "esp_rom_gpio.h"
 #include "esp32c6/rom/spi_flash.h"
-#include "soc/gpio_periph.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
 #include "soc/soc_caps.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c61.c

@@ -11,7 +11,6 @@
 #include "esp_log.h"
 #include "esp_rom_gpio.h"
 #include "esp32c61/rom/spi_flash.h"
-#include "soc/gpio_periph.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
 #include "soc/soc_caps.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c

@@ -11,7 +11,6 @@
 #include "esp_log.h"
 #include "esp_rom_gpio.h"
 #include "esp32h2/rom/spi_flash.h"
-#include "soc/gpio_periph.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
 #include "soc/soc_caps.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32p4.c

@@ -10,7 +10,7 @@
 #include "esp_err.h"
 #include "esp_log.h"
 #include "esp_rom_gpio.h"
-#include "soc/gpio_periph.h"
+#include "soc/spi_pins.h"
 #include "soc/spi_mem_reg.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"

components/bootloader_support/src/bootloader_common.c

@@ -17,7 +17,7 @@
 #include "bootloader_flash_priv.h"
 #include "bootloader_common.h"
 #include "bootloader_utility.h"
-#include "soc/gpio_periph.h"
+#include "soc/soc_caps.h"
 #include "soc/rtc.h"
 #include "soc/efuse_reg.h"
 #include "hal/gpio_ll.h"