fix: run a5sim bgemm through the shared pipe path

[zhoubot]

Summary

• remove the __CPU_SIM-only GM fallback from the A5 BGEMM mixed kernel so sim and hardware use the same [A, B, C] TPUSH/TPOP interface
• export per-dispatch CPU-sim execution context and task-cookie hooks from the A5 sim runtime so PTO ISA can share pipe state correctly across AIC/AIV DSOs
• fix a5sim kernel compilation to preserve the requested core role (__DAV_CUBE__ vs __DAV_VEC__) instead of building two no-op host kernels

Root Cause

There were two separate issues in the end-to-end a5sim path:

1. The example kernel still had a CPU-only ABI split, so simulation was not exercising the same TPUSH/TPOP call interface as A5 hardware.
2. The host-side sim compiler ignored core_type, so both compiled kernel binaries were missing __DAV_CUBE__ / __DAV_VEC__. That left the mixed BGEMM kernels effectively empty even after PTO-ISA pipe support was fixed.

This PR switches the example back to the shared cross-platform interface and publishes the runtime hooks that the PTO-ISA fix consumes.

Validation

source .venv313/bin/activate
export PTO_ISA_ROOT=/Users/zhoubot/github/pto-isa
export CC=/opt/homebrew/bin/gcc-15
export CXX=/opt/homebrew/bin/g++-15
python examples/scripts/run_example.py \
  -k tests/st/a5/tensormap_and_ringbuffer/bgemm/kernels \
  -g tests/st/a5/tensormap_and_ringbuffer/bgemm/golden.py \
  -p a5sim \
  --build

Result:

• TEST PASSED
• C: PASS (131072/131072 elements matched)

Related

• PTO-ISA PR: fix: share cpu sim pipe state across runtime tasks PTO-ISA/pto-isa#29

[gemini-code-assist]

Code Review

This pull request enhances the CPU simulation environment by introducing a mechanism to manage execution context, task cookies, and shared storage. It implements thread-local variables and a global storage map to track simulation state, and updates the kernel compiler to handle core-specific definitions and platform-specific linker flags. These changes enable the unification of kernel code by removing simulation-specific branches in test kernels. I have no feedback to provide.

[chatgpt-codex-connector]

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[chatgpt-codex-connector]

Guard CPU-sim task-cookie hook behind __CPU_SIM

aicore_execute now calls pto_cpu_sim_set_task_cookie(...) unconditionally, but the only implementation in this repo is in the sim host runner (src/a5/platform/sim/host/device_runner.cpp). This executor source is shared by the A5 runtime build (src/a5/runtime/tensormap_and_ringbuffer/build_config.py) and is linked for onboard via src/a5/platform/onboard/aicore/CMakeLists.txt, so non-sim A5 builds/runtime binaries will carry an unresolved CPU-sim symbol path. This should be gated to CPU simulation (or have a non-sim definition) to avoid breaking onboard builds.

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