Skip to content

Codex/issue 26 a5sim bgemm fix#402

Draft
ChaoZheng109 wants to merge 2 commits intohw-native-sys:mainfrom
ChaoZheng109:codex/issue-26-a5sim-bgemm-fix
Draft

Codex/issue 26 a5sim bgemm fix#402
ChaoZheng109 wants to merge 2 commits intohw-native-sys:mainfrom
ChaoZheng109:codex/issue-26-a5sim-bgemm-fix

Conversation

@ChaoZheng109
Copy link
Copy Markdown
Collaborator

No description provided.

RuoyuZhou and others added 2 commits March 30, 2026 12:11
…m macro

Move pto_cpu_sim_* simulation context APIs from device_runner.cpp into
a dedicated cpu_sim_state.cpp/h. Add CPU_SIM_SET_TASK_COOKIE macro to
inner_kernel.h (sim: real call, onboard: no-op), matching the existing
STORE_RELEASE_FENCE platform polymorphism pattern. This ensures
aicore_executor.cpp compiles cleanly on both sim and device targets.
Copy link
Copy Markdown

@gemini-code-assist gemini-code-assist bot left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Code Review

This pull request introduces a centralized CPU simulation state management system to better emulate hardware-specific execution contexts, such as block/subblock identities and task cookies. It adds thread-local storage for these contexts and a shared storage mechanism to support cross-core features like VEC_FIFO in simulation. The changes include updates to the kernel compiler for platform and core-specific flags, integration of state resets within the DeviceRunner, and the removal of simulation-specific code paths in test kernels to ensure they align with hardware implementations. All provided review comments were filtered out as they were purely evaluative or explanatory without offering actionable improvements, so I have no further feedback to provide.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant